Analyst, Supply Chain Planning
analogdevices
Staff Design Verification Engineer – SoC and eFPGA
analogdevices· 1010 Analog Devices Inc.
About this role
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
The Opportunity
ADI is seeking a talented and experienced Staff Design Verification Engineer to help develop next-generation eFPGA technology and the SoCs that integrate it. This role is ideal for engineers with strong digital design verification expertise, including UVM-based methodologies, SystemVerilog assertions, and end-to-end silicon verification.
While prior eFPGA experience is not required, candidates should possess a solid background in digital hardware design, architecture, and verification. You will work closely with cross-functional engineering teams to verify complex subsystems and ensure the successful delivery of high-quality silicon products.
What You'll Do
Partner with architecture, RTL, firmware, and software teams to understand new features and define comprehensive verification strategies.
Develop detailed verification plans covering feature interactions, system-level behavior, and hardware/software use cases.
Design, implement, and maintain directed and constrained-random verification environments and test suites.
Develop SystemVerilog assertions and functional coverage models to ensure thorough verification.
Debug simulation failures, identify root causes, and collaborate with design and firmware engineers to resolve issues.
Analyze functional and code coverage metrics and enhance verification content to achieve coverage goals.
Build and support end-to-end verification flows for eFPGA soft logic within SoCs, including RTL simulation, synthesis validation, and bitstream generation.
Contribute to verification methodology improvements, automation, and continuous integration workflows.
Minimum Qualifications
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent industry experience.
Strong understanding of SoC architectures and industry-standard bus protocols such as AXI and AHB.
Experience debugging RTL and firmware using simulation and waveform analysis tools.
Hands-on experience developing UVM-based verification environments.
Proficiency in SystemVerilog, Verilog, C/C++, and Python.
Experience developing automation solutions and working within distributed compute environments.
Working knowledge of SystemC and Transaction-Level Modeling (TLM).
Strong communication and collaboration skills, with the ability to work effectively across multidisciplinary teams.
Solid understanding of digital design fundamentals, computer architecture, timing analysis, power analysis, process variation, and reliability considerations.
Preferred Qualifications
5+ years of experience in SoC, subsystem, or microarchitecture verification.
Experience supporting successful silicon tape-outs in advanced process nodes (N4, N5, or similar technologies).
Knowledge of Functional Safety (FuSA) requirements and safety-focused hardware verification methodologies.
Experience with FPGA or programmable logic architectures.
Familiarity with continuous integration, regression automation, and verification productivity tools.
About the Team
ADI's Embedded FPGA (eFPGA) team plays a key role in enabling product differentiation across our platform SoCs. The team drives innovation in heterogeneous processing, hardware adaptability, and high-performance edge computing solutions across a wide range of markets and applications.
Through architectural innovation and execution across multiple complex programs, the eFPGA team continues to advance programmable hardware as a core element of ADI's Intelligent Edge strategy. Our technology enables high-speed, real-time processing while providing customers with the flexibility to adapt hardware functionality to evolving system requirements.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the time
Shift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $150,978 to $218,624.
Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.
This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.
Frequently Asked Questions
Is the salary disclosed for the Staff Design Verification Engineer – SoC and eFPGA position at analogdevices?
The salary for this Staff Design Verification Engineer – SoC and eFPGA role at analogdevices is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Staff Design Verification Engineer – SoC and eFPGA position at analogdevices located?
This Staff Design Verification Engineer – SoC and eFPGA role at analogdevices is based in US, CA, San Jose, Rio Robles. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Staff Design Verification Engineer – SoC and eFPGA role at analogdevices full-time or part-time?
This is listed as a Full time position. It is posted as a Staff Design Verification Engineer – SoC and eFPGA role in the 1010 Analog Devices Inc. department at analogdevices.
Which team or department does the Staff Design Verification Engineer – SoC and eFPGA at analogdevices belong to?
This Staff Design Verification Engineer – SoC and eFPGA position is part of the 1010 Analog Devices Inc. department at analogdevices. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Staff Design Verification Engineer – SoC and eFPGA position at analogdevices?
Click the "Apply Now" button on this page. You will be redirected to analogdevices's official application portal hosted on workday where you can submit your application directly.
When was the Staff Design Verification Engineer – SoC and eFPGA job at analogdevices posted?
This Staff Design Verification Engineer – SoC and eFPGA position at analogdevices was posted on Aug 7, 2026. Apply as soon as possible — early applications are often reviewed first.
Staff Design Verification Engineer – SoC and eFPGA
analogdevices
You'll be redirected to analogdevices's official application page on Workday.